(China (Mainland))
Product Summary
The LCMXO1200C-3TN144C is a Lattice CPLD. It is optimized to meet the requirements of applications traditionally addressed by CPLDs and low capacity FPGAs.
Parametrics
Absolute maximum ratings: (1)Supply Voltage VCC:-0.5V to 3.75V; (2)Supply Voltage VCCAUX:-0.5V to 3.75V; (3)Output Supply Voltage VCCIO:-0.5V to 3.75V; (4)I/O Tristate Voltage Applied:-0.5V to 3.75V; (5)Dedicated Input Voltage Applied:-0.5V to 4.25V; (6)Storage Temperature (ambient):-65℃ to 150℃; (7)Junction Temp.:+125℃.
Features
Features: (1)Instant-on-powers up in microseconds; (2)Single chip, no external configuration memory required; (3)Excellent design security, no bit stream to intercept; (4)Reconfigure SRAM based logic in milliseconds; (5)SRAM and non-volatile memory programmable through JTAG port; (6)Supports background programming of non-volatile memory; (7)256 to 2280 LUT4s ; (8)73 to 271 I/Os with extensive package options; (9)Density migration supported; (10)Lead free/RoHS compliant packaging.
Diagrams
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 LCMXO1200C-3TN144C |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTS 113 I/O |
Data Sheet |
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LCMX02280E-4MN132I |
Lattice |
SPLD - Simple Programmable Logic Devices INVALID PART I/O 1.2V |
Data Sheet |
Negotiable |
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LCMXO1200C-3B256C |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
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LCMXO1200C-3B256I |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
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LCMXO1200C-3BN256C |
Lattice |
FPGA - Field Programmable Gate Array 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
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LCMXO1200C-3BN256I |
Lattice |
FPGA - Field Programmable Gate Array 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
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LCMXO1200C-3FT256C |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd |
Data Sheet |
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